Embodiments of the invention relate to a method of fabricating a regular array of vertical bipolar junction transistors with dimensions below the minimum lithographical resolution. In particular, the present description refers to the manufacture of a regular array of vertical bipolar junction transistors operating as selection devices in a phase change memory.
Phase change memories are formed by memory cells connected at the intersections of bit-lines and word-lines and comprising each a memory element and a selection element. A memory element comprises a phase change region made of a phase change material, i.e., a material that may be electrically switched between a generally amorphous and a generally crystalline state across the entire spectrum between completely amorphous and completely crystalline states.
Typical materials suitable for the phase change region of the memory elements include various chalcogenide elements. The state of the phase change materials is non-volatile, absent application of excess temperatures, such as those in excess of 150° C., for extended times. When the memory is set in either a crystalline, semi-crystalline, amorphous, or semi-amorphous state representing a resistance value, that value is retained until reprogrammed, even if power is removed.
Selection elements may be formed according to different technologies. For example, they can be implemented by diodes, metal oxide semiconductor (MOS) transistors or bipolar transistors.